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Intel Xeon Phi Coprocessor 5110P

Breakthrough Performance for Your Highly-Parallel Applications

Extracting extreme performance from highly-parallel applications just got easier—much easier. The Intel® Xeon Phi™ coprocessor 5110P, based on Intel® Many Integrated Core (MIC) architecture, complements the industryleading performance and energy-efficiency of the Intel® Xeon® processor E5 family to enable dramatic performance gains for some of today's most demanding applications. You can now achieve optimized performance for even your most highly-parallel technical computing workloads, while maintaining a unified hardware and software environment.1

Intel® Xeon Phi™ Coprocessor 5110P Key Specifications:

• Up to 1 teraflops double-precision performance1,2
• Exceptional performance-per-watt for highly parallel workloads
• Single programming model for all your code
• Flexible usage models to maximize your investment

Intel Xeon Phi Coprocessor
5110P Specifications
Ideal for:

• Highly parallel applications using
over 100 threads
• Memory bandwidth-bound applications
• Applications with extensive vector use
Key Specifications:
• 60 cores/1.053 GHz/240 threads
• Up to 1 teraflops double-precision
• 8 GB memory and 320 GB/s bandwidth
• Standard PCIe* x16 form factor
• Linux* operating system, IP addressable
• Supported by the latest Intel® software
development products
• 512-bit wide vector engine
• 32 KB L1 I/D cache,
512 KB L2 cache (per core)
• 8 GB GDDR5 memory (up to 320 GB/s)
• 225W TDP
• X16 PCIe form factor (requires IA host)
• Host OS: Red Hat Enterprise Linux 6.x,
SuSE Linux 12+

A Single Programming Model for All Your Code

A wide assortment of programming languages, models, and tools support Intel architecture and all of them can be used with both Intel Xeon processors and Intel Xeon Phi coprocessors.

Applications that run on one processor family will run on the other. This uniformity can greatly reduce the complexity of developing, optimizing, and maintaining your software code. Existing applications will need to be tuned and recompiled for parallelism to maximize throughput, but your developers won’t need to rethink the entire problem and they won’t
need to master new tools and proprietary programming models. Instead, they can reuse existing code and maintain a common code base using familiar tools and methods.

Code can be optimized just once for both Intel Xeon processors and Intel Xeon Phi coprocessors. The same techniques—such as scaling applications to many cores and threads, blocking data for hierarchical memory and caches, and effective use of SIMD— deliver optimal performance for both processor and coprocessor families. The investment you make in parallelizing your code will deliver benefits across the full range of computing environments.
Even Higher Efficiency for Parallel Processing

While the Intel Xeon processor E5 family remains the preferred choice for the majority of applications, Intel Xeon Phi coprocessors provide more efficient performance for highlyparallel applications. They include many more and smaller cores, many more threads, and wider vector units. The high degree of parallelism compensates for the lower speed of each individual core to deliver higher aggregate performance for workloads that can be subdivided
into a sufficiently large number of simultaneous tasks. You can use Intel Xeon processors and Intel Xeon Phi coprocessors together to optimize performance for almost any workload.

Because both processor and coprocessor support the same software code and
programming models, your developers won’t have to reinvent the wheel to deliver
optimized performance.




Intel® Many Integrated Cores
(MIC) architecture
Large numbers of cores and threads enable efficient execution of hundreds of simultaneous tasks
to dramatically boost aggregate performance for highly-parallel applications.
Familiar Intel® architecture
programming model
Enables broad reuse of existing code. Also allows developers to use familiar tools and methods
and to maintain a common code base for Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors.
Linux* hosting capability Can operate as a dependent coprocessor or an independent server node to enable flexible usage
models and optimized support for diverse hardware and software environments.
IP Addressable Supports standard clustering models for simple integration into clustered environments.
Intel 22 nm technology with
3-D Tri-Gate transistors
Provides exceptional compute density and energy efficiency.
Up to 8 coprocessors per host server
(requires one PCIe* slot per coprocessor)
Enables simple scaling of highly-parallel execution resources to deliver desired performance levels.
1 Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to

2 Claim based on calculated theoretical peak double precision performance capability for a single coprocessor. 16 DP flops/clock/core * 60 cores * 1.053 GHz = 1.01088 Tflops.
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